Method and processor for high-speed convergence factor...

Details Method and processor for high-speed convergence factor... Method and processor for high-speed convergence factor...

G - Physics

06

F

G06F 7/38 (2006.01) G06F 7/52 (2006.01) G06F 7/552 (2006.01)

Patent

CA 2050353

2050353 9110188 PCTABS00006 A high-speed processor utilizes combinational logic and range limitation for a modified input value to increase efficiency in convergence factor determination for convergent division and square root computation. An input value (101) is modified to a value in a limited range (104), which is then partitioned into two subdivisions (106, 108). By utilizing these two groupings, the processing platform minimizes time consumption in conversion factor determination by inverting selected binary bits to form a modified factor (114) and utilizes that modified factor to facilitate high-speed convergence factor computation.

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