Memory address scanning circuit

G - Physics – 06 – F

Patent

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Details

354/239

G06F 13/00 (2006.01)

Patent

CA 1136285

ABSTRACT OF THE DISCLOSURE A memory address scaning circuit includes a clock pulse oscillator, an address counter supplied with the output pulse from the clock pulse oscillator, a memory supplied with the output signal of the address counter so as to control the address of the memory, a scanning control circuit connected to the clock pulse oscillator to ON/OFF control the output of the clock pulse oscillator, and a further separate scanning control circuit connected to the address counter to shift the count value thereof step by step.

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