Error detector circuit for receiver operative to receive...

Details Error detector circuit for receiver operative to receive... Error detector circuit for receiver operative to receive...

H - Electricity

04

L

H04L 1/20 (2006.01) H03M 13/00 (2006.01) H04B 7/26 (2006.01) H04L 1/00 (2006.01)

Patent

CA 2117560

An error detector circuit, and an associated method, is disclosed for a discrete receiver. The error detector circuit indicates bad frames of binary information signals which contain distorted bits of data in numbers so great as to prevent a convolutional decoder from generating, accurately, a decoded signal. When bit errors are detected in numbers beyond a first preselected value of the signal quality of a received signal combined with the detected number of bit errors forms a signal beyond a second preselected value, a bad frame is indicated.

L'invention est constituée par un circuit et une méthode de détection d'erreurs pour un récepteur. Le circuit de détection d'erreurs de l'invention détecte les trames des signaux d'information binaires qui contiennent des bits erronés en nombre suffisant pour empêcher un décodeur convolutif de décoder les signaux avec précision. Une image inacceptable est signalée quand le nombre de bits erronés dépasse une valeur prédéterminée correspondant à une qualité acceptable pour le signal reçu.

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