Pipeline accelerator for improved computing architecture and...

G - Physics – 06 – F

Patent

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G06F 9/38 (2006.01) G06F 9/30 (2006.01) G06F 9/445 (2006.01) G06F 9/46 (2006.01) G06F 15/78 (2006.01)

Patent

CA 2503617

A pipeline accelerator includes a memory and a hardwired-pipeline circuit coupled to the memory. The hardwired-pipeline circuit is operable to receive data, load the data into the memory, retrieve the data from the memory, process the retrieved data, and provide the processed data to an external source. In addition or in the alternative, the hardwired-pipeline circuit is operable to receive data, process the received data, load the processed data into the memory, retrieve the processed data from the memory, and provide the retrieved processed data to an external source. Where the pipeline accelerator is coupled to a processor as part of a peer-vector machine, the memory facilitates the transfer of data - whether unidirectional or bidirectional - between the hardwired-pipeline circuit(s) and an application that the processor executes.

L'invention concerne un accélérateur pipeline qui comporte une mémoire à laquelle est couplé un circuit pipeline câblé. Ledit circuit pipeline câblé permet de recevoir des données, de charger les données dans la mémoire, d'extraire les données de la mémoire, de traiter les données extraites, et de fournir les données traitées à une source externe. En outre, ou dans un autre mode de réalisation, ledit circuit permet de recevoir des données, de traiter les données reçues, de charger les données traitées dans la mémoire, d'extraire les données traitées de la mémoire, et de fournir à une source externe les données traitées qui ont été extraites. Dans le cas où l'accélérateur pipeline est couplé à un processeur en tant que partie d'une machine poste-vecteur, la mémoire facilite le transfert des données, d'une manière unidirectionnelle ou bidirectionnelle, entre le(s) circuit(s) pipeline(s) câblé(s) et une application que le processeur exécute.

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