Chip card equipped with a counter device

G - Physics – 07 – F

Patent

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Details

G07F 7/02 (2006.01) G07F 7/08 (2006.01)

Patent

CA 2288938

In order to render a chip card gratuity counter (6) more flexible, the invention consists in recording in the chip card memory (5) a file architecture to facilitate the management of its counters. Said architecture is characterised in that a counter unit file (7), wherein are located the counters relative to an application, is associated with rules (12) which are applicable thereto. Thus, the simple designation of a counter unit implies the implementation or rules applicable to the counters of this counter unit. This implementation is internal to the chip card and does not require any exchange with the reader. The chip card memory further comprises the rules file (12), the conditions file (13) and the computing file (14) the interaction of which provides greater flexibility of use.

Pour rendre plus souple la gestion du compteur (6) de gratification d'une carte à puce, on décide d'enregistrer dans la mémoire (5) de la carte à puce une architecture de fichiers permettant une gestion aisée de ses compteurs. Selon cette architecture, un fichier bloc compteur (7), où sont situés les compteurs relatifs à une application, est associé à des règles (12) qui leurs sont applicables. De ce fait, la simple désignation d'un bloc compteur implique la mise en oeuvre des règles applicables aux compteurs de ce bloc compteur. Cette mise en oeuvre est interne à la puce de la carte à puce. Elle ne nécessite pas d'échange avec le lecteur. La mémoire de la puce comporte encore le fichier (12) des règles, le fichier (13) de conditions et le fichier (14) de calcul dont l'interaction permet une grande souplesse d'utilisation.

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