G - Physics – 06 – F
Patent
G - Physics
06
F
354/167
G06F 7/52 (2006.01) G06F 7/48 (2006.01) G06F 7/72 (2006.01)
Patent
CA 2008774
To markedly improve the computational speed of A x B modulo N computation as compared with the prior-art Baker's method where A denotes a multiplicand; B denotes a multiplier; and N denotes a modulus, the number of multiply-additions and division (modular) subtractions is reduced on the basis of any given same higher radix number r. In practice, the modular subtracters c(k)N are previously determined on the basis of the partial products b(k-1)A at the succeeding processing stage (k-1) to reduce the absolute value of the partial remainder R(k) down to a value less than a modulus N, so that bit overflow from a predetermined computational range can be prevented. For instance, when the partial product b(k)A at the succeeding processing stage (k-1) is large, the modular subtracter c(k)N at the current stage (k) is also determined large. Further, the MSB of the multiplicand A is eliminated by transforming the multiplicand A from a range within [0, N-1] to a range [-N/2, N/2] to reduce the absolute value of the partial product. This is necessary to apply the same radix number r to both the partial products and the modular subtracters.
Gowling Lafleur Henderson Llp
Nippon Telegraph & Telephone Corporation
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