Method and device for detection and correction of errors in...

H - Electricity – 04 – L

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H04L 12/54 (2006.01) H04L 1/00 (2006.01) H04Q 11/04 (2006.01) H04L 12/56 (2006.01)

Patent

CA 2110207

- 12 - SUMMARY Method and device for detection and correction of errors in ATM cell headers. Of the type wherein it is made a series to parallel conversion (2) of the several data stream (1), obtaining a parallel data format of n bits, the clock rate of which is n times lower than the original. From the parallel input data of the ATM header, a syndrome word (3) is generated according to a determined function that indicates that no error has been detected, that more than one error has been detected, or which bit has to be corrected when only one error has been detected. The ATM cell headers are delayed (4) until the syndrome word has been completed, the error correction process (5) then being carried out, when required, in accordance with the syndrome word generated. In addition, an individual indication (7) for external use is generated of the result of the detection and possible correction process made. The device implements the method described. (Figure 1).

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