G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 7/60 (2006.01) G06F 17/50 (2006.01) G06K 9/36 (2006.01) G06T 5/50 (2006.01) G06F 19/00 (2006.01)
Patent
CA 2497592
A three-dimensional model of a semiconductor chip is produced from coarsely aligned mosaic images of respective layers of the semiconductor chip using an improved method for aligning the mosaic images, so that minimal operator intervention is required to produce the model. A line detection algorithm is applied to each of the mosaic images to produce a set of line segments identified by x and y coordinates of end points of the line segments with respect to a frame defined by a mosaic image in which each line segment occurs. Virtual reference marks are established using end points of different mosaic images that are vertically aligned to within an uncertainty of the coarse alignment of the mosaic images, and the virtual reference marks are used to compute a mean adjustment of the x and y coordinates of each of the mosaic images to produce a three dimensional coordinate space. The end points are processed within the three dimensional coordinate space to define vias, lines and branch lines of the semiconductor chip, which are used to build the three-dimensional model. Operator intervention is only required to verify putative line segments that are marked as uncertain because of poor agreement with predefined rules. The 3-D model may be annotated and viewed separately from the mosaic images.
Blaxell Zygo
Lachance Alexander R.
Blake Cassels & Graydon Llp
Chipworks Inc.
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