Multiple interface input/output port for a peripheral device

Details Multiple interface input/output port for a peripheral device Multiple interface input/output port for a peripheral device

G - Physics

06

F

G06F 13/20 (2006.01) G06F 13/38 (2006.01) G06F 13/40 (2006.01)

Patent

CA 2243506

A multiple interface input/output port (11) allows communications between an interface bus (14) of a peripheral device (10) and any one of a plurality of different types of interface buses (18) that may be provided in a host computer (16). An interface bus detection circuit (22) detects which type of interface bus (18) the peripheral device (10) is connected to on the host computer (16), and communications are then routed through an appropriate interface adapter (26) that enables communication between the interface buses (18) of the peripheral device (10) and host computer (16). The interface bus detection circuit (22) compares signal levels on selected ones of the lines (45) of the interface bus (14) of the host computer (16) to a reference potential to determine which of the selected lines (45) are grounded. The circuit then identifies the type of the interface bus (18, 14) to which it is connected based on the determination of which of the selected lines (45) of the interface bus (14) are grounded.

Point d'accès entrée/sortie (11) pour interfaces multiples permettant les communications entre un bus d'interface (14) de dispositif périphérique (10) et l'un quelconque de plusieurs types de bus d'interface (18) dont l'ordinateur central (16) peut être équipé. Un circuit de détection de bus d'interface (22) identifie le type de bus d'interface (18) par lequel le dispositif périphérique (10) est relié à l'ordinateur central (16), les communications sont ensuite acheminées par un adaptateur d'interface approprié (26) qui autorise la communication entre les bus d'interface (18) du dispositif périphérique (10) et l'ordinateur central (16). Le circuit de détection de bus d'interface (22) compare les niveaux des signaux sur certaines des lignes (45) du bus d'interface (14) de l'ordinateur central (16) par rapport à un potentiel de référence, pour déterminer lesquelles de ces lignes (45) sont reliées à la terre. Le circuit identifie ensuite le type de bus d'interface (18, 14) auquel il est relié en se basant sur la détermination des lignes (45) du bus d'interface (14) qui sont reliées à la terre.

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