Field effect transistor and method for manufacturing the same

H - Electricity – 01 – L

Patent

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H01L 29/788 (2006.01) H01L 29/423 (2006.01)

Patent

CA 2085524

ABSTRACT OF THE DISCLOSURE There is disclosed an FET having a high drain breakdown voltage and a short gate length comprising an active layer 2 formed on a surface layer of a semiconductor substrate 1; a source highly doped impurity region 4 and a drain highly doped impurity region 4 formed in the surface layer of the semiconductor substrate 1 to sandwich the active layer 2; an insulation film 5 formed on the source highly doped impurity region 4; a gate electrode 8 formed on the active layer 2 and the insulation film 5 while maintaining a constant distance 1GD from the drain highly doped impurity region 4; and a source electrode 6 and a drain electrode 7 formed on the source highly doped impurity region 4 and the drain highly doped impurity region 4, respectively.

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