Receiver and transmitter-receiver

Details Receiver and transmitter-receiver Receiver and transmitter-receiver

H - Electricity

04

B

H04B 1/16 (2006.01) H03L 7/099 (2006.01) H04B 1/40 (2006.01) H04B 7/185 (2006.01) H04L 7/027 (2006.01) H04L 7/033 (2006.01) H04L 27/233 (2006.01) H04L 27/00 (2006.01)

Patent

CA 2152107

A receiver comprises a demodulator for demodulating a received signal, a clock recovery circuit for regenerating a clock phase-synchronized with a symbol clock component included in the received signal and a frequency offset compensating means for controlling a variable division ratio of a variable divider constituting a phase-controlled loop of the clock recovery circuit so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the received signal and a free-running frequency of the clock recovery circuit. The receiver is constructed such that the compensation for the frequency offset is performed with operation timing different from that of the clock recovery circuit.

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