General-purpose memory access scheme using register-indirect...

Details General-purpose memory access scheme using register-indirect... General-purpose memory access scheme using register-indirect...

G - Physics

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G06F 12/06 (2006.01) G06F 9/312 (2006.01) G06F 9/38 (2006.01) G06F 12/02 (2006.01) G06F 13/16 (2006.01)

Patent

CA 2059923

Y09-90-166 ABSTRACT A memory access scheme achieved using a memory address register and a register-indirect memory accessing mode eliminates write back collisions, long cycle time, and enhances system performance. During memory address generation operations, an arithmetic-logic unit (ALU) generates memory addresses from data in a general purpose register (GPR). Then, the memory addresses are written back to the GPR and a memory address register (MAR). During memory access operations, the MAR is accessed for the memory addresses to access a memory. Two approaches are provided. In a first approach, use of the MAR during the memory access operations is explicit. In a second approach, use of the MAR during the memory access operations is transparent. According to the second approach, a controller is provided to validate the MAR during the memory access operations.

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