Data encoding and demodulation system

Details Data encoding and demodulation system Data encoding and demodulation system

H - Electricity

03

M

354/68

H03M 7/00 (2006.01) G06T 9/00 (2006.01) H03M 5/14 (2006.01)

Patent

CA 2016957

ABSTRACT A data encoding system and method for selectively encoding, demodulating, synchronizing a demodulator uses the following d=7, k=2 code: Image where X is a ONE if the last two bits of the preceding code word are both ZEROS and a ZERO otherwise, and the right-most bits are the first in time. The system encodes the data by encoding the first four bits of data to an eight-bit code word if the bits are all ZEROS and the last two bits of the previous code word are in a predetermined pattern. If the first four bits are not ZEROS the system encodes the first three data bits to form a six-bit code word if the first two bits are both ONES. Otherwise, the system encodes the first two data bits to form a four-bit code word. The system selects the code word which preserves the code limited run length. FIG 2.

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