Method and device for high level circuit design

Details Method and device for high level circuit design Method and device for high level circuit design

G - Physics

06

F

G06F 17/50 (2006.01) G06F 19/00 (2006.01)

Patent

CA 2346514

Two new ways are presented to implement ordinary programs with logic gates with a new method of timing within circuits, and a new method of circuit verification. Application-specific circuit design can be done by using a standard programming language to describe the function that a circuit is intended to perform, rather than by describing a circuit that is intended to perform that function. The circuits are produced automatically; they behave according to the programs, and have the same structure as the programs. In both methods, for timing local delays are used. A formal semantics is given for both programs and circuits in order to prove the correctness of the associated circuits.

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