Method of fabricating a field-effect transistor

Details Method of fabricating a field-effect transistor Method of fabricating a field-effect transistor

H - Electricity

01

L

H01L 21/336 (2006.01) H01L 29/08 (2006.01) H01L 29/78 (2006.01)

Patent

CA 2053458

PHA 1208 04.10.1991 ABSTRACT: A method of fabricating a field-effect transistor. In manufacturing a field-effect transistor structure, opposite-conductivity impurities are introduced into a semiconductor region (14) to form protection zones (26) and source/drain extensions (24), A shield (20 and 22) prevents the impurities from passing through the underlying section of the upper semiconductor surface (16). A further impurity is introduced into the semiconductor region to form main source/drain zones (34). A larger shield (20 and 32) prevents the further impurity from passing through the underlying section of the upper semiconductor surface. In the resultant FET structure, the final protection zones (26A) are fully surrounded along their lateral and lower surfaces either by the combined source/drain zones (34/24A) or by the combined zones and dielectric material (12). The final protection zones extend slightly under the gate electrode (20). The protection zones in combination with the final source/drain extensions (24A) substantially overcome the hot charge carrier effect.

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