Method of processing the signalling information within...

Details Method of processing the signalling information within... Method of processing the signalling information within...

H - Electricity

04

Q

344/25

H04Q 11/04 (2006.01) H04J 3/12 (2006.01) H04L 12/52 (2006.01)

Patent

CA 2032597

ABSTRACT In configurable intelligent primary multiplexers the individual 64 kbit/s channels of several incoming and outgoing PCM-links are are to be re-arranged with the aid of a commercially available integrated circuit in such a manner that the desired channel configuration is achieved. The signalling infor- mation belonging to the individual channels is transmitted for all intel- ligence channels of a link in the time slots No. 16 of the superframe, each time slot containing the signalling information of two channels. In order to be able to perform the re-arrangement of the signalling information in parallel to that of the intelligence channels without the continuous help of a processor the signalling bit stream lined-up by an ancillary device is converted in such a manner that the signalling information of the individual 64 kbit/s channels is in identically numbered time slots as they are allo- cated to the corresponding intelligence channels. For this reason the signalling information belonging to the intelligence channels 16-30 is stored in a shift register (SR1) at the input side and read out at the time slots corresponding to said intelligence channels. At the output side the lastnamed signalling information is stored in an analogous manner in a shift register (SR2) in order to be interleaved during the next frame with the signalling information of the intelligence channels 1-15.

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