Semiconductor device including a strained superlattice...

Details Semiconductor device including a strained superlattice... Semiconductor device including a strained superlattice...

H - Electricity

01

L

H01L 29/15 (2006.01) H01L 21/336 (2006.01) H01L 21/8234 (2006.01) H01L 29/10 (2006.01)

Patent

CA 2612127

A semiconductor device may include at least one pair of spaced apart stress regions (227, 228) , and a strained superlattice layer (225) between the at least one pair of spaced apart stress regions and including a plurality of stacked groups of layers . Each group of layers of the strained superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions .

La présente invention concerne un dispositif à semi-conducteur pouvant comprendre au moins une paire de zones de contrainte espacées (227, 228) et une couche à hétérostructure contrainte (225) dotée d'une pluralité de groupes de couches superposés qui se trouve entre ces zones. Chaque groupe de couches de la couche à hétérostructure contrainte peut comporter une pluralité de monocouches semi-conductrices de base superposées définissant une section semi-conductrice de base, et au moins une monocouche non semi-conductrice contrainte au sein d'un réseau cristallin de sections semi-conductrices de base adjacentes.

Affiliated with

Also associated with

Rating

Semiconductor device including a strained superlattice... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device including a strained superlattice..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device including a strained superlattice... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-2059041