Thin, dielectrically isolated island resident transistor...

Details Thin, dielectrically isolated island resident transistor... Thin, dielectrically isolated island resident transistor...

H - Electricity

01

L

356/162

H01L 29/73 (2006.01) H01L 29/08 (2006.01) H01L 29/732 (2006.01) H01L 29/78 (2006.01)

Patent

CA 2033780

The occupation area and thickness of dielectrically isolated island-resident transistor structures, which employ a buried subcollector for providing low collector resistance at the bottom of the island, are reduced by tailoring the impurity concentration of a reduced thickness island region to provide a low resistance current path from an island location directly beneath the base region to the collector contact. The support substrate is biased at a voltage which is less than the collector voltage, so that the portion of the collector (island) directly beneath the emitter projection onto the base is depleted of carriers prior to the electric field at that location reaching BCVEO, so as not to effectively reduce BVCEO. Since the support substrate bias potential depletes some of the region of the island beneath the base region of carriers, the doping of the island can be increased compared to the case where the substrate is not biased, while maintaining the electric field at this location less than the BVCEO field.

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