Arrangement and method relating to digital information

H - Electricity – 03 – K

Patent

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H03K 19/195 (2006.01)

Patent

CA 2225803

The present invention relates to a logic circuit arrangement comprising signal input means and signal output means (1, 2) (respectively) and a number of SFQ circuits comprising Josephson junctions wherein carrier means are used for carrying digital information. SFQ circuits comprising Josephson junctions are sampled at the input/output for producing DC voltages and a train comprising at least two single flux quanta is used as carrier means for information and phase locking between at least two Josephson junctions is used to provide at least two different dynamic states of which at least one provides an output signal.

La présente invention concerne un circuit logique comprenant un moyen d'entrée et un moyen de sortie des signaux (respectivement 1 et 2) et un certain nombre de circuits SFQ comportant des jonctions de Josephson. On utilise des moyens porteurs pour porter l'information numérique. Les circuits SFQ comprenant des jonctions de Josephson sont échantillonnés à l'entrée et à la sortie pour produire des tensions continues, et un train comprenant au moins deux quanta à flot simple est utilisé comme moyen porteur pour l'information. Le blocage de phase est employé entre au moins deux jonctions de Josephson pour donner au moins deux états dynamiques différents dont au moins l'un donne un signal de sortie.

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