Circuit for synchronizing picture and method therefor

H - Electricity – 04 – N

Patent

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H04N 5/08 (2006.01) H04N 7/62 (2006.01)

Patent

CA 2244472

A picture decoding synchronizing circuit and a picture decoding synchronizing method are provided. When the decoding synchronization is controlled in units of a picture, in a variable length decoder using the transferred PTS and DTS information, the value obtained by adding the previous DTS to an offset is determined to be the DTS value of the current picture, if errors are generated in the transferred PTS and DTS, considering the errors of the transferred bit stream. If no errors are generated in the PTS or DTS, then the transferred PTS and DTS are determined to be the DTS value of the current picture. By controlling the picture decoding using the determined DTS value, the bit buffer does not underflow or overflow and the decoded data is displayed naturally on a screen.

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