Shared memory system

Details Shared memory system Shared memory system

G - Physics

06

F

G06F 15/167 (2006.01)

Patent

CA 2239426

A shared memory system, comprising a plurality of memory banks and a plurality of processing units. Each processing unit has memory address and data buses, and generates a command signal for requesting a shared memory access. The invention employs at least one bus switching fabric comprising at least one pass gate bus switch. The bus switching fabric has a negligible propagation delay and is used to connect the memory address and data buses of each processing unit to each memory bank. A shared memory controller receives the memory access request signal associated with each processing unit. The shared memory controller controls the bus switching fabric and each memory bank in order to allow each memory bank to be concurrently and asynchronously accessed by different processing units.

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