Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

G - Physics

11

C

352/82.3

G11C 11/40 (2006.01) G11C 11/39 (2006.01) H01L 27/07 (2006.01) H01L 27/088 (2006.01) H01L 29/76 (2006.01)

Patent

CA 1092240

SEMICONDUCTOR MEMORY DEVICE Abstract A new type of nonvolatile static read/write memory cell is constructed with one MOS transistor and one MNOS transistor. These transistors together with a load resistor are complementarily combined to offer binary states in the lambda-shaped I-V curve for memory operation under normal power supply. Upon power failure, the MNOS transistor acts as a back-up element for nonvolatility. By impressing a control pulse on the drain of the MNOS transistor it is changed from the depletion mode to the enhancement mode, thereby storing the last memory contents before the power failure. The stored nonvolatile memory contents can be easily retrieved. Thus a small size static random memory is provided. The new cell is characterized by advantageous features such as small cell size, a simple peripheral circuit, operation with a unipolar power supply and low standby power consumption.

280161

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-401417