Recorder memory with different read and write rates

Details Recorder memory with different read and write rates Recorder memory with different read and write rates

G - Physics

11

B

354/235

G11B 20/10 (2006.01) G11B 20/00 (2006.01)

Patent

CA 1067622

MEMORY AND APPARATUS AND METHOD FOR USING SAME ABSTRACT OF THE DISCLOSURE An addressable memory is supplied with pulse coded data at a first rate for writing such data into addressable locations in the memory; and stored data is read out from addressable locations at another rate different from the write-in rate. One advantageous application of such a memory is for changing the time-axis parameter, such as the repetition rate, of data so as to effect time compression and/or expansion. Control over the memory is achieved by generating write clock pulses and read clock pulses at different repetition rates. Data, such as a pulse data bit, is written into an addressable location in the memory during the interval between successive write clock pulses. A data pulse bit is read out of the memory during the interval between successive read clock pulses. The read operation is delayed in the event that it coincides with a write operation. The resultant asynchronous pulse bits which are read out of the memory are reclocked, or synchronized, with the read clock pulses so as to form a synchronous pulse train at the read clock pulse repetition rate. -i-

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