Digital logic circuit for a dynamic buffer register

Details Digital logic circuit for a dynamic buffer register Digital logic circuit for a dynamic buffer register

G - Physics

11

C

328/39

G11C 11/00 (2006.01) G06F 5/08 (2006.01)

Patent

CA 1058711

ABSTRACT OF THE DISCLOSURE Data transfer and control apparatus for coupling between a data source having a first character per second rate of delivery of coded pulse groups each representing a character and a recorder for recording data in blocks of a fixed number of characters at a second character per second rate comprising an incremented data storage register; an incremented tag signal storage register; means for applying coded pulse groups to said register from said source; means for providing a tag signal, associated with a respective last named applied coded pulse group, to said tag signal register; means for incrementing said applied pulse groups and associated tag signals synchronously in their respective registers at a third character per second rate.

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