H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/178
H01L 21/302 (2006.01) H01L 21/205 (2006.01) H01L 21/22 (2006.01)
Patent
CA 1118536
EPITA~IAL PROCESS FOR PRODUCING VERY SHARP AUTODOPING PROFILES AND VERY LOW DEFECT DENSITIES ON SUBSTRATES WITH ~IGH CONCENTRATION BURIED IMPURITY LAYERS Abstract _ _ A method is described for depositing silicon epitaxy with very low defect levels and sharp dopant profiles which are suitable for fabricating high performance, shallow device structures. The epitaxial layer envisioned is less than about 2 microns in thickness. The layer is deposited upon a silicon substrate that has subcollector buried layers therein of above about 1 x 102 N type impurity. The substrate is baked at between about 1120 to 1180C in hydrogen ànd then the epitaxial layer is formed using silicon tetrachloride and a temperature of between about 1000 to 1100C thereon.
326114
International Business Machines Corporation
Na
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