G - Physics – 11 – C
Patent
G - Physics
11
C
352/82.3
G11C 11/40 (2006.01) G11C 16/04 (2006.01) H01L 29/792 (2006.01)
Patent
CA 1060993
Abstract of the Disclosure A nonvolatile semiconductor memory having an insulated gate field effect transistor whose structure is so made as to permit, during the write operation, a substrate surface region below the gate to be substantially enclosed by depletion layers extended from the source and drain regions or by said depletion layers and a channel formed between said regions, thereby increasing a resistance between the substrate and said substrate surface region to decrease the writing current in amount and the writing voltage in level.
208942
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