Address translator

Details Address translator Address translator

G - Physics

06

F

354/243

G06F 13/00 (2006.01) G06F 1/00 (2006.01) G06F 12/06 (2006.01)

Patent

CA 1155966

ABSTRACT A memory addressing apparatus is des- cribed comprising a circuit responsive to a current external memory address on an input line and a signal generated by an auxiliary memory circuit for providing a current internal memory address for addressing an internal memory. For maximum program security, the above described components are all located in a single integrated circuit package.

371174

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