H - Electricity – 05 – K
Patent
H - Electricity
05
K
117/64
H05K 3/02 (2006.01) H01L 21/00 (2006.01) H01L 21/027 (2006.01)
Patent
CA 1066144
ABSTRACT A process for producing fine structures on a base such as a semicon- ductor device having electrode structures or a conductor path structures char- acterized by providing a base having a surface which is either etchable or is provided with an auxiliary etchable layer, providing a mask on the surface, which mask has openings complementary to the fine structure of material to be applied on the surface, providing an etching agent which attacks the surfaces of the base without attacking the mask, etching the uncovered portions of the base until an under-etching of predetermined width exists beneath the edges of the mask, depositing the layer of material on the entire surface, control- ling the amount of depositing so the layer of material being deposited on the mask and on the etched surfaces of the base are not in contact with each other, and subsequently removing the mask with the layer of material deposited there- on. If an auxiliary layer is on the surface it may be subsequently removed by etching without substantially etching the deposited fine structure or it may be retained to provide closely spaced electrode patterns. If the auxiliary layer is to be removed, it is of a material such as a metal alloy that can be selectively etched without damage to the material or metal deposited as the fine structure.
230935
Aktiengesellschaft Siemens
Na
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