G - Physics – 06 – F
Patent
G - Physics
06
F
354/182
G06F 7/52 (2006.01)
Patent
CA 1096503
ABSTRACT Two numbers are multiplied together without first changing either of them, if negative, to a positive number, thereby minimizing the time required in the multiplication process. In the multiplication, depending upon the sign of the multiplier and the sign of a bit in a predetermined bit location of the multiplier as shifted in a shift register, the multiplier and the multiplicand are operated on by either a shift operation or operated on by a shift and add operation. -1-
283169
Miu Ming T.
Negi Virendra S.
Honeywell Information Systems Inc.
Smart & Biggar
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