G - Physics – 06 – F
Patent
G - Physics
06
F
356/30, 352/41.2
G06F 13/00 (2006.01) G11C 7/00 (2006.01) G11C 11/411 (2006.01) G11C 11/416 (2006.01) H01L 27/102 (2006.01)
Patent
CA 1157949
ABSTRACT OF THE DISCLOSURE This invention provides a semiconductor integrated cir- cuit device which can be reliably operated. The device com- prises a plurality of word lines, a plurality of word drivers each connected to one of the word lines; a plurality of hold lines; a plurality of pairs of bit lines; a plurality of bit drivers, each being connected to one of the pairs of bit lines; a plurality of memory cells of integrated injection logic each connected to one of the word lines, to one of the hold lines and to one of the pairs of bit lines; and a bit line clamp circuit connected between the pairs of bit lines and a reference power supply. The clamp circuit comprises at least one dummy cell, any fluctuation of characteristics induced in each dummy cell by manufacturing processes being relative to those of the memory cells, whereby a reference voltage of the reference power supply minus a voltage drop due to the clamp circuit is applied to the bit lines.
363439
Hayashi Toshio
Ono Chikai
Toyoda Kazuhiro
Fujitsu Limited
Mcfadden Fincham
Nippon Telegraph & Telephone Public Corporation
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