Method for manufacturing a semiconductor integrated circuit...

Details Method for manufacturing a semiconductor integrated circuit... Method for manufacturing a semiconductor integrated circuit...

H - Electricity

01

L

356/128

H01L 21/22 (2006.01) H01L 21/32 (2006.01) H01L 21/762 (2006.01) H01L 21/8234 (2006.01)

Patent

CA 1074457

METHOD FOR MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE ABSTRACT OF THE DISCLOSURE In manufacturing an insulated gate semiconductor integrated circuit using both a self-alignment diffusion process and a non-self-alignment diffusion process, a mask having a combined pattern for a self-alignment diffusion and a non-self-alignment diffusion is prepared, an oxidation prevention layer for preventing thermal oxidation of the mask is selectively formed on a semi- conductor substrate, those areas of the semiconductor substrate which are not covered by the oxidation pre- vention layer are oxidized by thermal oxidation to form oxidized layers thereon, and impurities are diffused in the sequence of the non-self-alignment area and the self-alignment area to build in an insulated gate field effect transistor. According to the present method, steps produced in the insulating layer on the semi- conductor substrate are minimized so that the breakage of the metallized pattern which extends over the stepped areas is prevented.

270612

Affiliated with

Also associated with

Rating

Method for manufacturing a semiconductor integrated circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing a semiconductor integrated circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a semiconductor integrated circuit... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-968827