Semiconductor arrangement, particularly a storage...

G - Physics – 11 – C

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328/128, 352/82.

G11C 11/40 (2006.01) G11C 11/412 (2006.01) H01L 27/088 (2006.01) H01L 27/092 (2006.01) H01L 27/12 (2006.01) H03K 3/356 (2006.01)

Patent

CA 1046640

ABSTRACT A storage arrangement employing first and second field effect transistors which are complementary to one another and connected in series, with the second transistor being of the depletion type, a load element, such as a resistor or transistor, being connected in series with such first men- tioned transistors, with one side of such load element connected to the drain terminal of the first transistor and the other side of such load element con- nected to a line to which a supply voltage is connected, the drain-terminal of the second transistor being connected to a second line, which may form a word line, the gate terminal of the second transistor being connected to the drain terminal of the first transistor, and, preferably, a selector ele- ment such as a diode or transistor being operatively disposed between a third line and the junction of the load element and drain terminal of said first transistor, which third line may form a bit line, and a method of operating such arrangement.

210248

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