A bpsk demodulator circuit using an anti-parallel...

Details A bpsk demodulator circuit using an anti-parallel... A bpsk demodulator circuit using an anti-parallel...

H - Electricity

04

L

H04L 27/22 (2006.01)

Patent

CA 2517641

An anti-parallel loop carrier synchronization circuit for coherent binary phase shift keyed (BPSK) demodulation is disclosed. One embodiment comprises an anti-parallel dual phase-locked loop (PLL), which locks the carrier by its upper PLL(0°) and lower PLL (180°) alternately, according to the data bits contained in the received BPSK signal.

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