A high-speed asynchronous decompression circuit for...

Details A high-speed asynchronous decompression circuit for... A high-speed asynchronous decompression circuit for...

H - Electricity

03

M

H03M 7/40 (2006.01) G06T 9/00 (2006.01) H03M 7/42 (2006.01) H04L 1/22 (2006.01) H04N 7/26 (2006.01) H04N 7/50 (2006.01)

Patent

CA 2247548

There is provided an architecture and implementation of a high-speed decompression engine for variable-length-coded data, such as Huffman-coded data. The engine is particularly targeted to processors where embedded programs are stored in compressed form and decompressed at runtime during instruction cache refill. The decompression engine uses a unique asynchronous variable decompression rate architecture to process variable-length-coded instructions. The resulting circuit is significantly smaller than comparable synchronous decoders, yet has a higher throughput rate than almost all existing designs.

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