A high speed current mode logic gate circuit architecture

Details A high speed current mode logic gate circuit architecture A high speed current mode logic gate circuit architecture

H - Electricity

03

K

H03K 19/094 (2006.01) H01L 29/772 (2006.01) H03K 19/0175 (2006.01) H03K 19/20 (2006.01)

Patent

CA 2399744

An integrated circuit logic topology or architecture suitable for low voltage differential logic operating at radio frequencies is disclosed. The topology, referred to as enhanced pseudo common mode logic, is similar to and compatible with traditional CML, and provides the additional advantage of eliminating the need for level conversion between consecutive logic gates, thereby increasing the potential maximum operating frequency of subsystems implemented using the invention. The invention retains most of the advantages of traditional CML, and in addition permits the independent selection of output logic high level and output logic low level so that they may be matched with the succeeding circuit input levels.

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