A method for checking designs with a verification tool

Details A method for checking designs with a verification tool A method for checking designs with a verification tool

G - Physics

06

F

G06F 17/50 (2006.01) G01R 31/3183 (2006.01) G06F 11/22 (2006.01)

Patent

CA 2300499

A system's ability to traverse a given sequence of states is checked by employing a verification tool to develop sets of input test vectors, where each set of input test vectors causes the system to move from one state in the given sequence of states to the next state in the given sequence of states. Each set of input test vectors is obtained by formulating the hypothesis that the system could not reach the desired state. Applying the hypothesis to the verification tools allows the tools to disprove the hypothesis by providing, as a means of disproving the hypothesis, the desires set of input test vector.

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