G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 9/30 (2006.01) G06F 9/45 (2006.01) G06F 9/46 (2006.01)
Patent
CA 2428284
A method of ordering machine instructions to reduce spilt code involves, for each machine instruction that is ready for scheduling, determining an amount by which the size of a committed set of machine instructions would increase upon the scheduling of the machine instruction; and scheduling the machine instruction for which the determined amount is smallest. The currently committed instructions may be determined to be the machine instructions that are already scheduled as well as the machine instructions that are descendent from already scheduled machine instructions. The result is that new computations upon which a target processor will embark tend to be deferred. Bit vectors may be employed for efficiency during the assessment of candidate instructions that are ready for scheduling. The method may be triggered when the risk of registers becoming overcommitted becomes high, as may occur when the number of available processor registers drops below a certain threshold.
Bonaventure Damien
Mcinnes James Lawrence
Ibm Canada Limited - Ibm Canada Limitee
Saunders Raymond H.
LandOfFree
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