A risc processor device and its instruction address...

Details A risc processor device and its instruction address... A risc processor device and its instruction address...

G - Physics

06

F

G06F 9/30 (2006.01) G06F 9/455 (2006.01)

Patent

CA 2712683

A RISC processor and its instruction address conversion looking-up method. The device comprises a decoder, which includes a look-up-table module for realizing the conversion from X86 source instruction address to MIPS target instruction address by using a look-up-table. The look-up-table module includes a looking-up submodule for indexing the look-up-table based on content, if anything is retrieved then the corresponding content is stored into a target register and if not then an entry address that fail to retrieve service program is stored into the target register; a indexing submodule for indexing the look-up-table based on content and getting index of table item in which the content resides.

La présente invention concerne un dispositif à microprocesseur RISC et son procédé de consultation de conversion d'adresses d'instructions. Le dispositif comporte un décodeur, comprenant un module de table de consultation permettant de réaliser la conversion depuis une adresse d'instructions de source X86 vers une adresse d'instruction cible MIPS à l'aide d'une table de consultation. Le module de table de consultation comporte un sous-module de consultation permettant d'indexer la table de consultation en fonction du contenu, et en cas de récupération, le contenu correspondant est stocké dans un registre cible, sinon une adresse d'entrée quine réussit pas de récupérer un programme de service est stockée dans le registre cible ; un sous-module d'indexage pour indexer la table de consultation en fonction du contenu et l'obtention d'index d'élément de table dans lequel le contenu se trouve.

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