A signal processing circuit for a solid-state imaging apparatus

H - Electricity – 04 – N

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350/41

H04N 9/04 (2006.01) H04N 9/64 (2006.01)

Patent

CA 2026793

A signal processing circuit for a solid-state imaging apparatus in which an imaging output signal from each solid-state image sensor of an imaging section making use of spatial offsetting is digitized to form a detail signal for image enhancement by digital signal processing. A first delay circuit having at least one delay unit with a delay time approximately equal to one horizontal scanning period provides the above mentioned delay time to a green color imaging signal of the digital output signal obtained by digitizing image output signals read from the solid-state image sensors. The signal synthesis is then performed in a first synthesis circuit to limit the band of the green color imaging signal in the perpendicular imaging signal. A second delay circuit having at least one digital delay unit having a delay time about equal to one horizontal scanning period provides the above mentioned delay time to one of the red or blue color imaging signals or combined red and blue color imaging signals of the above mentioned digital output signal. Signal synthesis is then performed by a second synthesis unit to limit the band of the red or blue color imaging signal or the combined red and blue color imaging signals in the perpendicular direction. Equal amounts of the first and second synthesis signals are summed together in a summation unit so as to be outputted as the horizontal detail signal via digital filer unit.

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