A system for the parallel assembly of data transmissions in...

H - Electricity – 04 – L

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Details

H04L 12/56 (2006.01) H04L 1/16 (2006.01) H04L 29/06 (2006.01) H04Q 11/04 (2006.01) H04L 29/08 (2006.01)

Patent

CA 2188130

The present invention is generally directed to the transmission of data in various types of communication systems, including local area networks (LANs) and wide area networks (WANs). A main object of the present invention is to provide a system (2) based on a parallel structure that can assemble (3) and disassemble (4) packet information (1) in constant time, no matter how corrupted, out of order, duplicated the arriving packets (1a, 1b). A further object of the present invention is to provide a system (2) that would improve efficiency in broadband networks, particularly if implemented in a VLSI chip using the low complexity architecture-and-reassembly of the present invention.

La présente invention concerne de manière générale la transmission de données dans divers types de systèmes de communication, dont des réseaux locaux (LAN) et des réseaux longue distance (WAN). Le principal objet de la présente invention est de fournir un système (2) basé sur une structure parallèle qui peut assembler (3) et désassembler (4) des informations (1) en paquets en temps constant, quel que soit l'état d'altération, de défectuosité ou de duplication des paquets arrivants (1a, 1b). Un autre objet de la présente invention est de fournir un système (2) susceptible d'améliorer l'efficacité dans des réseaux à large bande, en particulier s'il est mis en oeuvre dans une puce à intégration à très grande échelle utilisant l'architecture et le réassemblage de faible complexité de la présente invention.

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