A tapped delay line space/time processor weight estimating...

Details A tapped delay line space/time processor weight estimating... A tapped delay line space/time processor weight estimating...

H - Electricity

04

L

H04L 1/24 (2006.01) H04L 1/06 (2006.01) H04L 1/20 (2006.01) H04L 25/03 (2006.01)

Patent

CA 2265102

A method is disclosed of estimating calculating the weights for a tapped delay line space/time processor. Those symbols having levels of which it is most certain whether they represent a logical zero or a logical one, are used in addition to the training sequence to set the tap weights.

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