Access request control apparatus in data processing system

G - Physics – 06 – F

Patent

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354/230.85

G06F 9/38 (2006.01) G06F 13/18 (2006.01)

Patent

CA 1193024

ABSTRACT OF THE DISCLOSURE The present invention relates to an access request control apparatus and more specifically to an apparatus for determining priority among a plura- lity of access requests in the memory control apparatus. One of the access requests from a plurality of channel processing devices (CHP's) is selected by the first priority determination circuit, while one of said selected CHP requests, requests from a plurality of central processing units (CPU's) and the requests of loop back from the pipe line control circuit is selected by the second priority determination circuit. In case a request of CHP is not selected by the second priority determination circuit or selected but nullified in the course of a pipe line, such a request is returned again to the first priority determination circuit. But, in this case, a higher priority is given in the first priority determination circuit. In addition, the priority algo- rithm in the second priority determination circuit considers the kinds of operations of each access request and thereby highly efficient memory access can be realized.

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