Active matrix display having pixel driving circuits with...

G - Physics – 09 – G

Patent

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G09G 3/36 (2006.01) G02F 1/1362 (2006.01) G02F 1/1368 (2006.01) G09G 3/18 (2006.01)

Patent

CA 2286007

A pixel driving circuit (400) receives a signal voltage VA from a column bus (403) and generates thereform, a back plate electrode voltage VB which is approximately twice that of a signal voltage VA. Included in the pixel driving circuit (400) are three transistors (402, 407 and 408) and a storage capacitor (404). During a first time period, two of the three transistors turn on to charge up or discharge the storage capacitor to the signal voltage VA, while the third transistor (407) is tamed off, and during a second time, the third transistor (407) is turned on to effectively double the voltage provided to the back plate electrode, while the other two of the three transistors are turned off.

Selon cette invention, un circuit de commande de pixels (400) reçoit une tension de signal VA d'un bus colonne (403), puis génère à partir de cela une tension d'électrode de fond de panier VB qui est approximativement le double de la tension de signal VA. Trois transistors (402, 407, 408) ainsi qu'un condensateur mémoire (404) sont intégrés au circuit de commande de pixels (400). Pendant une première période, deux des trois transistors deviennent passants pour charger ou décharger le condensateur mémoire pour donner la tension de signal VA, le troisième transistor étant alors bloquant. Pendant une deuxième période, le troisième transistor (407) devient passant pour doubler de façon satisfaisante la tension alimentée à l'électrode de fond de panier, les deux autres transistors étant bloquants.

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