Adapter for the connection to a clear-channel...

H - Electricity – 04 – J

Patent

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Details

H04J 3/06 (2006.01) H04L 7/033 (2006.01) H04L 7/10 (2006.01)

Patent

CA 2094408

ABSTRACT ADAPTER FOR THE CONNECTION TO A CLEAR-CHANNEL TELECOMMUNICATION NETWORK An Adapter for the connection to a digital clear-channel network which comprises line line interface circuits having a transmit and a receive part for providing the analog attachment to said network. The line interface circuits are provided with a reset input for allowing the disconnection of the adapter to the network. The Adapter further includes a Digital Phase-locked Loop device DPLL driven by a master clock which provides the timing and synchronization signals to the line interface circuits. The DPLL has means for dividing a master clock down to an internal INT clock, a phase comparator for comparing the internal signal with a reference signal being synchronized with the receive clock extracted from the line by line interface. The phase comparison process operates with the use of an internal Correction Signal (CS) characterized by a correction window being centered around the falling edge of the internal INT signal. The frequency correction is achieved by frequency correction means which stretches or shrinks the master clock by half a period when a correction has been decided by the phase comparator. The adapter further includes means for resetting the line interface circuits at the power-on of the machine thereby causing the disconnection of the adapter to the line, and means for initializing the DPLL after the reset of the line interface circuits of the adapter and the DPLL is consequently set in an state where no correction is performed on the master clock and the falling edge of the internal INT signal is aligned on the considered transition of the reference signal. The reset of the DPLL is performed rapidly after the reset of the line interface circuits. This assures that, in the case where a first adapter is already connected to the clear-channel digital network, the synchronization process will not be destabilized by the connection of a second adapter. This allows the communication of two "slave" adapter through a G. 703 clear-channel digital network.

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