Adaptive instruction processing by array processor having...

G - Physics – 06 – F

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354/230.7, 354/2

G06F 9/44 (2006.01) G06F 15/80 (2006.01) F02B 75/02 (2006.01)

Patent

CA 1268554

Abstract of the Disclosure ADAPTIVE INSTRUCTION PROCESSING BY ARRAY PROCESSOR HAVING PROCESSOR IDENTIFICATION AND DATA DEPENDENT STATUS REGISTERS IN EACH PROCESSING ELEMENT Equipping individual processing elements with instruction derivation means provides an array processor with adaptive spatial-dependent and data- dependent processing capability. The instruction becomes variable, at the processing element level, in response to spatial and data parameters of the data stream. An array processor can be optimized, for example, to carry out very different instructions on spatial-dependent data such as blank margin surrounding the black lines of a sketch. Similarly, the array processor can be optimized for data-dependent values, for example to execute different in- structions for positive data values than for negative data values. Providing each processing element with a processor identification register permits an easy setup by flowing the setup values to the individual processing elements, together with setup of condition control values. Each individual adaptive processing element responds to the composite values of original setup and of the data stream to derive the instruction for execution during the cycle. In the usual operation, each adaptive processing element is individually addressed to set up a base instruction; it also is conditionally set up to execute a derived instruction instead of the base instruction. An array processor made up of adaptive processing elements can adapt dynamically to changes in its input data stream, and thus can be dynamically optimized, resulting in greatly en- hanced performance at very low incremental cost.

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