H - Electricity – 04 – J
Patent
H - Electricity
04
J
344/25
H04J 3/16 (2006.01) H04L 12/64 (2006.01)
Patent
CA 1250936
Abstract Method and system for configuring a succession of complex frames to be used for exchanging synchronous circuit switched bits and asynchronous packet switched bits between nodes connected through medium links working at any bit rates in a teleprocessing network. Each complex frame which contains an integer number of bits equal to Nc or Nc+1 chosen as close as possible to a predetermined number Na (256), is made of a succession of subframes and delimited by flags, in such a way that the period between two flags is equal to nT+e, T being the period of existing Time Division Multiplex Frames (125 microseconds) and n being an integer number higher or equal to 1 which depends upon the medium link bit rate and e being a period of time lower than a medium link bit period. The subframes have a duration less or equal to T, each subframe i contain an integer number Nsi of bits, said integer number being allocated to carry an integer number of circuit switched bit slots and the remaining bits being used to carry asynchronous packet switched bits. The R bits remaining in the complex frame, with Image are used to carry f flag bits and r=R-f padding bits which are used to carry asynchronous packet switched bits. Figure 2-A
505862
Calvignac Jean
Secondo Pierre
Barrett B.p.
International Business Machines Corporation
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