Adaptive predistortion circuit

H - Electricity – 04 – L

Patent

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325/54, 340/72

H04L 1/00 (2006.01) H03F 1/32 (2006.01) H04B 1/62 (2006.01) H04L 27/36 (2006.01)

Patent

CA 2008131

PHF 89.508 18.12.1989 ABSTRACT: "Adaptive predistortion circuit." An adaptive predistortion circuit for a digital transmission system comprises a predistortion circuit (521, 522, 523) predistorting the input data before they pass through a modulator (56) and then through an amplifier (57) and an adaptation circuit (611, 612, 613) continuously adapting the predistortion circuit to the stream of input data in response to a demodulation of the stream of transmitted data. The predistortion circuit further comprises an encoder (51) which, on a first path, in response to digital data ak, generates digital data bk which leave a first predistortion circuit (521) in a predistorted manner in-phase with the symbol clock, on a second path, digital data ck which leave a second predistortion circuit (522) in a predistorted manner phase- shifted by T/3 relative to the symbol clock and on a third path, digital data dk which leave a third predistortion circuit (523) in a predistorted manner phase-shifted by 2T/3 relative to the symbol clock. The signals bk, ck and dk are obtained by means of a polynomial encoding. The encoding may be performed by shift registers (621 ... 62I) addressing a memory (63) or, by a transversal filter (711, 712, 713). It may also be obtained by means of an analog transmission filter (81) followed by samplers (821, 822, 823). [Figure 5].

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