Adaptive predistortion circuit with a memory

Details Adaptive predistortion circuit with a memory Adaptive predistortion circuit with a memory

H - Electricity

04

B

340/72

H04B 15/00 (2006.01) H03F 1/32 (2006.01) H04L 27/36 (2006.01)

Patent

CA 2011837

PHF 83.517 22-2-1990 ABSTRACT: Adaptive predistortion circuit with a memory. Adaptive predistortion circuit with a memory for a digital transmission system which comprises: - a set (10) of input registers storing various consecutive data symbols, - a predistortion circuit (11) predistorting the data of the consecutive data symbols before their passing through a modulator (14) and then through an amplifier (15), - and an adaptation circuit (19) which, in response to a demodulation (16, 171, 172, 181, 182) of the stream of transmitted data symbols continuously adapts the predistortion circuit (11) to the stream of the input data symbols. The adaptation circuit (19) comprises a set (21) of counters/accumulators which determine the centre of gravity of the smeared spots (clouds) created by the distortion by calculating a set of mean errors that is used for adapting the predistortion circuit (11). Preferably, the predistortion circuit (11) is a random access memory. In order to reduce the size of this random access memory the symmetry of the constellation is used and therefore at the input the constellation is reduced to a quarter of the constellation. Reverse operations are thus necessary at the output and in the adaptation loop.

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