Address detection circuit using a memory

H - Electricity – 04 – L

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354/230

H04L 12/56 (2006.01) G06F 12/02 (2006.01) G06F 12/06 (2006.01) H04L 12/00 (2006.01)

Patent

CA 1317676

66446-462 ABSTRACT An address detection circuit for high-speed detection of long addresses by the use of a memory addressable at a shorter address length than the length of the address to be detected. The novel circuit comprises a subfield address generator which generates N (greater than 1) subfield addresses obtained by dividing an input address by N. A subfield indicating signal generator generates a subfield indicating signal for indicating the order in which these N subfields are inputted. The subfield and subfield indicating signal forms a memory address, which is generated N times. An address comparator compares the memory addresses and memory addresses stored therein and generates comparison signals. A decision circuit decides that, when the comparison signals prove to be identity signals N times, the input address represents the address to be detected and generates an address detection signal.

580146

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