G - Physics – 06 – F
Patent
G - Physics
06
F
354/239
G06F 9/26 (2006.01) G06F 9/355 (2006.01) G06F 12/02 (2006.01)
Patent
CA 1173171
ABSTRACT An address expanding system comprises an instruction register which is coupled to a main memory and which stores an instruction read from the main memory. The instruction includes a common address modification field for specifying an index address modification and base address modification and a displacement. A plurality of general registers are connected through a bus to the instruction register, the contents of one of the general registers being added to a logical address in the index address modification. A plurality of base registers are coupled through the bus to the instruction register, the contents of one of the base registers being added to the logical address in the base address modification. A base register address generating means receives a first data from the common address modi- fication field and produces a second data to specify one of the base registers. Adding means is coupled to the instruction register, the general registers and the base registers. The adding means adds the contents of the general registers, the base registers and the displacement.
385396
Ridout & Maybee Llp
Tokyo Shibaura Denki Kabushiki Kaisha
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